Circuits on a die may experience a wide temperature range, where changes in temperature may be both spatial and temporal in nature. This may be of concern in a computer system such as that illustrated in FIG. 1, where die 102 comprises a microprocessor with many sub-blocks, such as arithmetic logic unit (ALU) 104 and on-die cache 106. Die 102 may also communicate to other levels of cache, such as off-die cache 108. Higher memory hierarchy levels, such as system memory 110, are accessed via host bus 112 and chipset 114. In addition, other functional units not on die 102, such as graphics accelerator 116 and network interface controller (NIC) 118, to name just a few, may communicate with die 102 via appropriate busses or ports. Each of these functional units may physically reside on one die or more than one die. Some or parts of more than one functional unit may reside on the same die.
As operating frequency and transistor integration increase, one or more die used in the computer system of FIG. 1 may experience a wide range of temperatures. This may be of particular concern, but not limited to, microprocessors. The spatial variation in temperature may occur because some circuits (functional blocks) on a microprocessor die may be more active than other circuits (functional blocks) on the same die, thereby consuming more power and leading to so-called “hot spots” on the die. The temporal variation in temperature may occur because some functional units on a die are switched on or off, thereby causing a temporal change in power consumption.
A temperature change in a transistor, unless compensated for, will change the threshold voltage as well as carrier mobility of the transistor. As temperature decreases, the magnitude of the threshold voltage and carrier mobility increase. This will affect both the OFF (or leakage) current IOFF of the transistor as well as the ON current ION of the transistor. The effect of temperature change on IOFF is more severe than that of ION. But the ratio of ION/IOFF affects performance robustness. Consequently, circuit designers usually try to keep this ratio greater than some minimum value, e.g., on the order of 100 to 1000, by designing a circuit to operate at its worst-case ION/IOFF ratio, corresponding to its expected maximum temperature. But when the temperature is lower than its expected maximum, a circuit designed for its worst-case ION/IOFF ratio will not operate optimally, unless other changes are made to the circuit parameters.